What was the first Intel x86 processor with “Base + Index * Scale + Displacement” addressing mode?LCD...

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What was the first Intel x86 processor with “Base + Index * Scale + Displacement” addressing mode?


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2















As the title says, what's the first x86 processor from Intel that supports the following addressing mode?



mov %reg, 8(base, index, 4)
^^^^^^^^^^^^^^^^^


where the content of %reg will be stored to the address base + 4*index + 8 (both base and index are registers).



I only know that 8086 doesn't support this and 80586 supports this. I'm guessing it's 80386 because it's the first 32-bit x86 Intel CPU?










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    2















    As the title says, what's the first x86 processor from Intel that supports the following addressing mode?



    mov %reg, 8(base, index, 4)
    ^^^^^^^^^^^^^^^^^


    where the content of %reg will be stored to the address base + 4*index + 8 (both base and index are registers).



    I only know that 8086 doesn't support this and 80586 supports this. I'm guessing it's 80386 because it's the first 32-bit x86 Intel CPU?










    share|improve this question







    New contributor




    iBug is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
    Check out our Code of Conduct.























      2












      2








      2








      As the title says, what's the first x86 processor from Intel that supports the following addressing mode?



      mov %reg, 8(base, index, 4)
      ^^^^^^^^^^^^^^^^^


      where the content of %reg will be stored to the address base + 4*index + 8 (both base and index are registers).



      I only know that 8086 doesn't support this and 80586 supports this. I'm guessing it's 80386 because it's the first 32-bit x86 Intel CPU?










      share|improve this question







      New contributor




      iBug is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
      Check out our Code of Conduct.












      As the title says, what's the first x86 processor from Intel that supports the following addressing mode?



      mov %reg, 8(base, index, 4)
      ^^^^^^^^^^^^^^^^^


      where the content of %reg will be stored to the address base + 4*index + 8 (both base and index are registers).



      I only know that 8086 doesn't support this and 80586 supports this. I'm guessing it's 80386 because it's the first 32-bit x86 Intel CPU?







      intel x86






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      iBug is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
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      asked 4 hours ago









      iBugiBug

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          This addressing mode was introduced with the first 32-bit x86 processor, i.e. the 80386.



          Ref: 80386 Programmer's reference manual sec 2.5.3.2.






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            7














            This addressing mode was introduced with the first 32-bit x86 processor, i.e. the 80386.



            Ref: 80386 Programmer's reference manual sec 2.5.3.2.






            share|improve this answer




























              7














              This addressing mode was introduced with the first 32-bit x86 processor, i.e. the 80386.



              Ref: 80386 Programmer's reference manual sec 2.5.3.2.






              share|improve this answer


























                7












                7








                7







                This addressing mode was introduced with the first 32-bit x86 processor, i.e. the 80386.



                Ref: 80386 Programmer's reference manual sec 2.5.3.2.






                share|improve this answer













                This addressing mode was introduced with the first 32-bit x86 processor, i.e. the 80386.



                Ref: 80386 Programmer's reference manual sec 2.5.3.2.







                share|improve this answer












                share|improve this answer



                share|improve this answer










                answered 4 hours ago









                alephzeroalephzero

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